- All sections
- G - Physics
- G06F - Electric digital data processing
- G06F 30/398 - Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM]
Patent holdings for IPC class G06F 30/398
Total number of patents in this class: 1813
10-year publication summary
|
1
|
4
|
8
|
44
|
162
|
369
|
386
|
339
|
377
|
96
|
| 2015 | 2016 | 2017 | 2018 | 2019 | 2020 | 2021 | 2022 | 2023 | 2024 |
Principal owners for this class
| Owner |
All patents
|
This class
|
|---|---|---|
| Taiwan Semiconductor Manufacturing Company, Ltd. | 36809 |
455 |
| International Business Machines Corporation | 60644 |
133 |
| Synopsys, Inc. | 2829 |
122 |
| Samsung Electronics Co., Ltd. | 131630 |
105 |
| Cadence Design Systems, Inc. | 1788 |
90 |
| ASML Netherlands B.V. | 6816 |
65 |
| Siemens Industry Software Inc. | 1633 |
50 |
| Changxin Memory Technologies, Inc. | 4732 |
34 |
| Intel Corporation | 45621 |
32 |
| Xilinx, Inc. | 4086 |
24 |
| D2s, Inc. | 150 |
16 |
| Texas Instruments Incorporated | 19376 |
15 |
| ARM Limited | 4353 |
14 |
| Applied Materials, Inc. | 16587 |
13 |
| Realtek Semiconductor Corp. | 3028 |
13 |
| TSMC Nanjing Company, Limited | 99 |
13 |
| Altera Corporation | 2241 |
11 |
| Coventor, Inc. | 67 |
11 |
| X Development LLC | 1453 |
11 |
| Celera, Inc. | 16 |
11 |
| Other owners | 575 |